Wireless Projector Adapter
Design Guide
 
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SM501

SM501 Register Handling

Registers are handled by means of IOCTL(2). Header files of the target architecture are required to compile a code involving ioctl.

# cp -R linux/include/asm-sh /usr/local/sh4-linux/include/asm

First, open dev/fb0:

fd = open("/dev/fb/0", O_RDWR);

Then, set MMIO address as follows:

ioctl(fd, 0, address)

Read a register value as follows:

int reg32;
ioctl(fd, 1, &reg32)

Finally, write a value to the register as follows:

ioctl(fd, 2, reg32)

Voyager GX Frame Buffer

SM501 is accessed through seven frame buffers, which are initialized on boot. They contain one video plane, two graphics planes, two alpha planes, and two hardware cursor planes. See SM501_MMCC_Databook pp.(1-12)-(1-13) for details of the video layers. Primary devices with display resolutions of VGA, SVGA, and XGA are considered in this document.

Each node is treated as a character device. See Documentation/fb/framebuffer.txt for details of the frame buffer. Just like MEM(4) device, a frame buffer is opened by OPEN(2):

fd = open("/dev/fb0", O_RDWR);

and mapped into memory by MMAP(2) to access:

char *p = (char *) mmap(0, size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);

See SM501_MMCC_Databook pp.(1-26)-(1-28) for details of the memory map and register space.

SM501 Memory Map

Panel Planea40c0000
Video Plane 0a4340000
Video Plane 1a45c0000
Video Alpha Planea4840000
Alpha Planea4ac0000
Panel Cursor Planea4d40000
CRT Planea4d50000
CRT Cursor Planea4fd0000
MMIO Basea7e00000

SM501 Register Values - Common Settings

offsetvaluedescription
0000800ff0000GPIO 31:0 Control
0000c00000000GPIO 63:32 Control
000102ed547c0
0001405126734
0003800021877Current Gate
0004000021877Power Mode 0 Gate
0004800021877Power Mode 1 Gate
8001c00000000Panel Plane TL Location
8005000000000Video Plane TL Location
8009000000000Video Alpha TL Location
8010c00000000Alpha Plane TL Location
8004000016207Video Display Control
8008000010001Video Alpha Display Control
8010000010001Alpha Display Control
8020000010000CRT Display Control
90000000022d1Capture Control
90004001000b4Capture Clipping
9000801e00280Chapture Size
9001800000004Capture FIFO Control
9000c00340000Capture Buffer 0 Address
90010005c0000Capture Buffer 1 Address

SM501 Register Values - VGA

offsetvaluedescription
0004410090101Power Mode 0 Clock
0004C10090101Power Mode 1 Clock
8000007013100Panel Display Control
8001402800000Panel FB Width
8001801e00000Panel FB Height
80024033f027fPanel Horizontal Total
80028004a028bPanel Horizontal Sync
8002c020c01dfPanel Vertical Total
80030000201e9Panel Vertical Sync
8005800000000Video Scale
8004805000500Video FB Width
8001005000500Panel FB Offset/Window Width
8008805000500Video Alpha FB Offset/Window Width
8010805000500Alpha FB Offset/Window Width
9001400000500Capture Buffer Offset
8002001df027fPanel Plane BR Location
8005401df027fVideo Plane BR Locatoin
8009401df027fVideo Alpha BR Location
8011001df027fAlpha Plane BR Location

Bob

8005808000000Video Scale
90000000022b1Capture Control

SM501 Register Values - SVGA

offsetvaluedescription
0004408090101Power Mode 0 Clock
0004C08090101Power Mode 1 Clock
8000007010100Panel Display Control
8001403200000Panel FB Width
8001802580000Panel FB Height
80024040f031fPanel Horizontal Total
8002800770357Panel Horizontal Sync
8002c02990257Panel Vertical Total
800300005027cPanel Vertical Sync
800580ccc0cccVideo Scale
8004806400640Video FB Width
8001006400640Panel FB Offset/Window Width
8008806400640Video Alpha FB Offset/Window Width
8010806400640Alpha FB Offset/Window Width
9001400000640Capture Buffer Offset
800200257031fPanel Plane BR Location
800540257031fVideo Plane BR Locatoin
800940257031fVideo Alpha BR Location
801100257031fAlpha Plane BR Locatoin

Bob

8005806670cccVideo Scale
90000000022b1Capture Control

SM501 Register Values - XGA

offsetvaluedescription
0004401090101Power Mode 0 Clock
0004C01090101Power Mode 1 Clock
8000007013100Panel Display Control
8001404000000Panel FB Width
8001803000000Panel FB Height
80024052f03ffPanel Horizontal Total
8002800870417Panel Horizontal Sync
8002c032502ffPanel Vertical Total
8003000050302Panel Vertical Sync
800580a000a00Video Scale
8004808000800Video FB Width
8001008000800Panel FB Offset/Window Width
8008808000800Video Alpha FB Offset/Window Width
8010808000800Alpha FB Offset/Window Width
9001400000800Capture Buffer Offset
8002002ff03ffPanel Plane BR Location
8005402ff03ffVideo Plane BR Locatoin
8009402ff03ffVideo Alpha BR Location
8011002ff03ffAlpha Plane BR Location

Bob

8005805000a00Video Scale
90000000022b1Capture Control

SM501 Register Values - SXGA

offsetvaluedescription
0004400090101Power Mode 0 Clock
0004C00090101Power Mode 1 Clock
8000007013100Panel Display Control
8001405000000Panel FB Width
8001804000000Panel FB Height
8002406a704ffPanel Horizontal Total
8002801600514Panel Horizontal Sync
8002c043403ffPanel Vertical Total
80030001a0400Panel Vertical Sync
8005807800780Video Scale
800480a000a00Video FB Width
800100a000a00Panel FB Offset/Window Width
800880a000a00Video Alpha FB Offset/Window Width
801080a000a00Alpha FB Offset/Window Width
9001400000800Capture Buffer Offset
8002003ff04ffPanel Plane BR Location
8005403ff04ffVideo Plane BR Locatoin
8009403ff04ffVideo Alpha BR Location
8011003ff04ffAlpha Plane BR Location

Bob

8005803c00800Video Scale
90000000022b1Capture Control

Voyager GX Frame Buffer - Device Nodes

/dev/fb0Primary Graphicsnot used
/dev/fb1Videovideos from a ZV port
/dev/fb2Video Alphabitmap character display
/dev/fb3Alphabitmap character display
/dev/fb4Primary Cursornot used
/dev/fb5Secondary Graphicsnot used
/dev/fb6Secondary Cursornot used

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