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&size(24){&color(darkgreen){''Hardware Design''};}; #navi(WPAR) ~''CONTENTS'' #contents ---- ** SPECIFICATION [#f04873c7] |~ITEM|~SPEC.|~REMARK| |>|>|LEFT:~CPU block| |CPU|SH4|Renesas SH7751R| |Clock|240MHz|| |ROM|16MBytes|FUJITSU MBM29DL640E90TN x 2| |RAM|64MBytes|ICSI IC42S81600-7T x 4| |>|>|LEFT:~LAN block| |LAN|10/100BASE-T|Realtek RTL8139C(L)+| |>|>|LEFT:~MPEG block| |MPEG LSI|MPEG-1/2/4|VWEB VW2010| |Video Input|NTSC x 2, S-Video|Philips SAA7115HL| |Audio Input|L/R x 2|Philips UDA1342TS| |Video Output|NTSC x 1, S-Video|CIRRUS CS4954| |Audio Output|L/R x 1|CIRRUS 4334| |>|>|LEFT:~I/F| |Cardbus Bridge|for KS2931|TI PCI1510| |Compact Flash?|3.3V only|use SH4 local bus| |RS232C|for console|MAXIM MAX3232| |>|>|LEFT:~Power supply| |Voltage|DC+12V|| |Consumption|3A|| ** MEMORY MAP [#q5c60d2c] -LOCAL BUS MEMORY MAP |~AREA|~P2 ADDRESS|~WIDTH|~CONTENTS| |CS0|A0000000 - A0FFFFFF|32|16Mbytes FlashROM| |CS1|A4FE0000 - A4FE0001|8|GPIO PLD| ||A4FD0000 - A4FD0000|8|PIC PLD| ||A4FB0000 - A4FB0001|8|LCD PLD (wait 15)| |CS2| | | | |CS3|AC000000 - AFFFFFFF|32|64Mbytes SDRAM| |CS4| | | | |CS5|B4000000 - B400000F|16|Compact flash| |CS6| | | | -INTERRUPT MAP |~IRQ|~IRL|~CONTENTS|~LSI|~PIC MASK BIT| |IRQ0|0|LAN controler|RTL8139C|BIT0| |IRQ1|IRL1|MPEG encoder|VW2010|BIT1| |IRQ2|IRL2|Cardbus bridge|PCI1510|BIT2| |IRQ3|IRL3|CF slot|CF slot|BIT3| |IRQ4|IRL4|GPIO|EPM3064ALC-44|BIT4| -PCI CONFIGURATION MAP |~DEVNO|~IDSEL|~CONTENTS| |0 |AD[16]|LAN controler| |1 |AD[17]|MPEG encoder| |2 |AD[18]|Cardbus bridge| -PCI BUS REQUEST MAP |~REQ|~GNT|~CONTENTS| |REQ1|GNT1|LAN controler| |REQ2|GNT2|Cardbus bridge| |REQ3|GNT3|MPEG encoder| |REQ4|GNT4|| ** GPIO MAP [#d516c049] *** INPUT PORT (A4FE0000) [#ededb998] |~BIT|~CONTENTS|~LOGIC| |7|I2C SDA|0:LOW, 1:HIGH| |6|PUSH-SW|0:PUSH, 1:OPEN| |5|PUSH-SW|0:PUSH, 1:OPEN| |4|PUSH-SW|0:PUSH, 1:OPEN| |3|DIP-SW3|0:CLOSE, 1:OPEN| |2|DIP-SW2|0:CLOSE, 1:OPEN| |1|DIP-SW1|0:CLOSE, 1:OPEN| |0|DIP-SW0|0:CLOSE, 1:OPEN| *** OUTPUT PORT (A4FE0001) [#u8b99a18] |~BIT|~CONTENTS|~LOGIC| |7|I2C SDA|0:LOW, 1:HIGH| |6|I2C SCK|0:LOW, 1:HIGH| |5||| |4||| |3||| |2||| |1|LED1|0:ON, 1:OFF| |0|LED0|0:ON, 1:OFF| Reading this output port then the latest output data can be read. ** POWER BLOCK [#r7604f30] *** ESTIMATED POWER CONSUMPTION [#r2bea610] |~ITEM|~PARTS|~MIN|~TYP|~MAX|~QTY|~TOTAL MAX| |CPU|SH7751R(3.3V)||100mA|145mA|1|0.479W| ||SH7751R(1.5V)||255mA|660mA|1|0.990W| |ROM|MBM29DL640E|0.005mA|16mA|56mA|2|0.370W| |RAM|IC42S16800|25mA|100mA|160mA|4|2.112W| |MPEG|VW2010(3.3V)||0.8W||1|0.8W| ||VW2010(1.8V)||||1|| |RAM|MT48LC2M32B2|60mA|150mA|225mA|2|1.458W| |ADC|SAA7115||||1|| |ADC|UDA1342||29mA||1|0.095W| |DAC|CS4954||170mA|300mA|1|0.99W| |DAC|CS4334(5V)||15mA|19mA|1|0.095W| |WLAN|KS2931||500mA||1|1.65W| |LANC|RTL8139C(L)+||330mA||1|1.089W| |LCD|SC1602BSLB(5V)||10mA||1|0.050W| |>|>|>|>|>|LEFT:~TOTAL|10.178W| *** 5V POWER SUPPLY [#u58c0a9d] The 5V power supply is used by CS4334 and LCD unit. This power must be shutdown by switch logic. |~ITEM|~SPEC|~REMARK| |input|12V|| |output|5V|| |current|29mA|| |IC|LM1117|Tj=125C, Qjc=15C/W| |efficiency|0.2W|| |heatsink|354.4C/W|Ta=50C| *** 3.3V POWER SUPPLY [#v0818a3f] The 3.3V power supply is used by each LSI's I/O ports. This power must be shutdown by switch logic. |~ITEM|~SPEC|~REMARK| |input|12V|| |output|3.3V|| |current|3A|| |IC|LM2596|Tj=125C, Qjc=2C/W| |efficiency|73%|| |heatsink|23.3C/W|Ta=50C| *** 1.8V POWER SUPPRY [#ydf9d146] The 1.8V power supply is used by VW2010 core. |~ITEM|~SPEC|~REMARK| |input|3.3V|| |output|1.8V|| |current|400mA|| |IC|LM1117|Tj=125, Qjc=15C/W| |efficiency|0.6W|| |heatsink|110C/W|Ta=50C| *** 1.5V POWER SUPPRY [#h1c76d5d] The 1.5V power supply is used by SH7751R core. |~ITEM|~SPEC|~REMARK| |input|3.3V|| |output|1.5V|| |current|660mA|| |IC|LM1117|Tj=125C, Qjc=15C/W| |efficiency|2.31W|| |heatsink|17.5C/W|Ta=50| ** PIC PLD Design [#v209a882] -VHDL Source Code #ref(PIC_vhd.pdf) -Result of Simulation #ref(PIC_sim.pdf) ** GPIO PLD Design[#md3cab2b] -VHDL Source Code #ref(GPIO_vhd.pdf) -Result of Simulation #ref(GPIO_sim.pdf) **LCD PLD Design [#lb302adf] ***Timing Chart [#f76453a6] -LCD Timing Chart #ref(LCD-tc.jpg) -CPU Timing Chart #ref(CPU-tc.jpg) ***PLD Design [#id112788] -VHDL Source Code #ref(LCD_vhd.pdf) -Result of Simulation #ref(LCD_sim.pdf) **Appendix [#zf3373ac] ***Circuit Diagram [#pe8b8751] #ref(wsb_sch_0109.pdf) ***BOM etc. [#s33d4dbf] -BOM #ref(wsb_bom_0109.txt) #ref(BOM0109.xls) -XRF #ref(wsb_xrf_0109.txt) -NET #ref(wsb_net_0109.txt)
