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RIGHT:''&counter(all); - &counter(yesterday); - &counter(today); - &online;''
CENTER:&size(28){&color(darkgreen){''Wireless Projector Adapter Design Guide''};};
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#contents
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*** SXGA Modemodelie [#n318d732]
|Horizontal Total     |1850|
|Horizontal Sync Width| 130|
|Horizontal Sync start|1280|
|Vertical Total       |1330|
|Vertical Sync Height |   2|
|Vertical Sync start  |1320|



*** SM501 frame buffers and their memory address [#s5ba3c7b]
are shown in the following table. The MMIO base address of the WPA is ''0xa7e00000''.
|~Priority|~Name     |~Address  |~Node   |~Descriptions|
|0|Panel Plane       |0xa40c0000|/dev/fb0|Primary Graphics, image display|
|2|Video Plane 0     |0xa4340000|/dev/fb1|Video, videos from a ZV port|
|2|Video Plane 1     |0xa45c0000|~|~|
|3|Video Alpha Plane |0xa4840000|/dev/fb2|Video Alpha, image display|
|4|Alpha Plane       |0xa4ac0000|/dev/fb3|Alpha, image display|
|1|Panel Cursor Plane|0xa4d40000|/dev/fb4|Primary Cursor, not used|
|0|CRT Plane         |0xa4d50000|/dev/fb5|Secondary Graphics, not used|
|1|CRT Cursor Plane  |0xa4fd0000|/dev/fb6|Secondary Cursor, not used|

The Panel/CRT resolution is changed through register settings. It should be noted that Linux frame buffer-related information such as '''vinfo''' and '''finfo''' is no longer reliable except for the default resolution. A Panel/CRT timing signal should be turned off during the resolution change to avoid inappropriate timing signals.

The video alpha plane is disabled when a video plane is disabled.
On the other hand, the alpha plane is independent of the video plane.
Each buffer has a display priority. 
Priority 0 means the bottom layer, while priority 4 means the top layer.

*** Video overlay [#w51866af]
is realized as follows:
+Draw a background image on fb0.
+Enable fb0
+Set geometry of fb1
+Enable fb1
+Play a video

*** Double buffering in displaying a sequence of images [#k6657934]
is realized as follows:
+Let WPA_FB0_FB_ADDRESS indecate VRAM0
+Draw an image onto fb5
+Let WPA_FB0_FB_ADDRESS indecate VRAM5
+Draw an image onto fb0
+Repeat above steps

*** Sample register settings [#se678fd7]
are shown in the following table.
 
|~Offset|~Value|~Description|
|0x00010|0x2ed547c0||
|0x00014|0x05126734||
|0x00008|0x00ff0000|GPIO 31:0 Control|
|0x0000c|0x00000000|GPIO 63:32 Control|
|0x00038|0x00021877|Current Gate|
|0x00040|0x00021877|Power Mode 0 Gate|
|0x00048|0x00021877|Power Mode 1 Gate|
|0x8001c|0x00000000|Panel Plane TL Location|
|0x80050|0x00000000|Video Plane TL Location|
|0x80090|0x00000000|Video Alpha TL Location|
|0x8010c|0x00000000|Alpha Plane TL Location|
|0x80040|0x00016203|Video Display Control|
|0x80080|0x00010001|Video Alpha Display Control|
|0x80100|0x00010001|Alpha Display Control|
|0x80200|0x00010000|CRT Display Control|
|0x90000|0x000022d1|Capture Control|
|0x90004|0x001000b4|Capture Clipping|
|0x90008|0x01e00280|Chapture Size|
|0x90018|0x00000004|Capture FIFO Control|
|>|>|LEFT:~XGA Kernel|
|0x9000c|0x046c0000|Capture Buffer 0 Address|
|0x90010|0x04840000|Capture Buffer 1 Address|
|>|>|LEFT:~SXGA Kernel (experimental)|
|0x9000c|0x00340000|Capture Buffer 0 Address|
|0x90010|0x005c0000|Capture Buffer 1 Address|
|>|>|LEFT:~VGA|
|0x00044|0x10090101|Power Mode 0 Clock|
|0x0004C|0x10090101|Power Mode 1 Clock|
|0x80000|0x07013101|Panel Display Control|
|0x80014|0x02800000|Panel FB Width|
|0x80018|0x01e00000|Panel FB Height|
|0x80024|0x033f027f|Panel Horizontal Total|
|0x80028|0x004a028b|Panel Horizontal Sync|
|0x8002c|0x020c01df|Panel Vertical Total|
|0x80030|0x000201e9|Panel Vertical Sync|
|0x80058|0x00000000|Video Scale|
|0x80048|0x05000500|Video FB Width|
|0x80010|0x05000500|Panel FB Offset/Window Width|
|0x80088|0x05000500|Video Alpha FB Offset/Window Width|
|0x80108|0x05000500|Alpha FB Offset/Window Width|
|0x90014|0x00000500|Capture Buffer Offset|
|0x80020|0x01df027f|Panel Plane BR Location|
|0x80054|0x01df027f|Video Plane BR Locatoin|
|0x80094|0x01df027f|Video Alpha BR Location|
|0x80110|0x01df027f|Alpha Plane BR Location|
|>|>|LEFT:~Bob|
|0x80058|0x08000000|Video Scale|
|0x90000|0x000022b1|Capture Control|
|>|>|LEFT:~SVGA|
|0x00044|0x08090101|Power Mode 0 Clock|
|0x0004C|0x08090101|Power Mode 1 Clock|
|0x80000|0x07010101|Panel Display Control|
|0x80014|0x03200000|Panel FB Width|
|0x80018|0x02580000|Panel FB Height|
|0x80024|0x040f031f|Panel Horizontal Total|
|0x80028|0x00770357|Panel Horizontal Sync|
|0x8002c|0x02990257|Panel Vertical Total|
|0x80030|0x0005027c|Panel Vertical Sync|
|0x80058|0x0ccc0ccc|Video Scale|
|0x80048|0x06400640|Video FB Width|
|0x80010|0x06400640|Panel FB Offset/Window Width|
|0x80088|0x06400640|Video Alpha FB Offset/Window Width|
|0x80108|0x06400640|Alpha FB Offset/Window Width|
|0x90014|0x00000640|Capture Buffer Offset|
|0x80020|0x0257031f|Panel Plane BR Location|
|0x80054|0x0257031f|Video Plane BR Locatoin|
|0x80094|0x0257031f|Video Alpha BR Location|
|0x80110|0x0257031f|Alpha Plane BR Locatoin|
|>|>|LEFT:~Bob|
|0x80058|0x06670ccc|Video Scale|
|0x90000|0x000022b1|Capture Control|
|>|>|LEFT:~XGA|
|0x00044|0x01090101|Power Mode 0 Clock|
|0x0004C|0x01090101|Power Mode 1 Clock|
|0x80000|0x07013101|Panel Display Control|
|0x80014|0x04000000|Panel FB Width|
|0x80018|0x03000000|Panel FB Height|
|0x80024|0x052f03ff|Panel Horizontal Total|
|0x80028|0x00870417|Panel Horizontal Sync|
|0x8002c|0x032502ff|Panel Vertical Total|
|0x80030|0x00050302|Panel Vertical Sync|
|0x80058|0x0a000a00|Video Scale|
|0x80048|0x08000800|Video FB Width|
|0x80010|0x08000800|Panel FB Offset/Window Width|
|0x80088|0x08000800|Video Alpha FB Offset/Window Width|
|0x80108|0x08000800|Alpha FB Offset/Window Width|
|0x90014|0x00000800|Capture Buffer Offset|
|0x80020|0x02ff03ff|Panel Plane BR Location|
|0x80054|0x02ff03ff|Video Plane BR Locatoin|
|0x80094|0x02ff03ff|Video Alpha BR Location|
|0x80110|0x02ff03ff|Alpha Plane BR Location|
|>|>|LEFT:~Bob|
|0x80058|0x05000a00|Video Scale|
|0x90000|0x000022b1|Capture Control|
|>|>|LEFT:~SXGA (experimental)|
|0x00044|0x00090101|Power Mode 0 Clock|
|0x0004C|0x00090101|Power Mode 1 Clock|
|0x80000|0x07013101|Panel Display Control|
|0x80014|0x05000000|Panel FB Width|
|0x80018|0x04000000|Panel FB Height|
|0x80024|0x06a704ff|Panel Horizontal Total|
|0x80028|0x01600514|Panel Horizontal Sync|
|0x8002c|0x043403ff|Panel Vertical Total|
|0x80030|0x001a0400|Panel Vertical Sync|
|0x80058|0x07800780|Video Scale|
|0x80048|0x0a000a00|Video FB Width|
|0x80010|0x0a000a00|Panel FB Offset/Window Width|
|0x80088|0x0a000a00|Video Alpha FB Offset/Window Width|
|0x80108|0x0a000a00|Alpha FB Offset/Window Width|
|0x90014|0x00000800|Capture Buffer Offset|
|0x80020|0x03ff04ff|Panel Plane BR Location|
|0x80054|0x03ff04ff|Video Plane BR Locatoin|
|0x80094|0x03ff04ff|Video Alpha BR Location|
|0x80110|0x03ff04ff|Alpha Plane BR Location|
|>|>|LEFT:~Bob|
|0x80058|0x03c00800|Video Scale|
|0x90000|0x000022b1|Capture Control|